Design-Reuse

Xylon announces logiI2C Master Controller IP core for Xilinx FPGAs

July 9, 2012, Zagreb (Croatia) – New logiI2C Bus Master Controller IP core from Xylon's logicBRICKS IP library supports single master I2C communications and enables bug-free data transfers. It is ...
Commercial Integrator

Audinate Releases Dante IP Core for Xilinx FPGAs

Audinate recently announced the availability of Dante IP Core, a soft IP solution for audio manufacturers. Dante IP Core “allows OEMs working with field programmable gate array [FPGA]-based designs to ...
Design-Reuse

Arasan Announces availability of its Total I3C IP Solution for Xilinx FPGA's

Arasan Chip Systems, a member of the Xilinx Alliance Partner Program today announced the immediate availability of its Total I3C IP Solution for Xilinx FPGA San Jose, CA, Dec. 17, 2018 – Arasan today ...