Design-Reuse

Agile Analog launches first complete RISC-V analog IP subsystem at RISC-V Summit Europe

Cambridge, UK -- June 5, 2023 --Agile Analog, the customizable analog IP company, is launching the first complete analog IP subsystem for RISC-V applications at the RISC-V Summit Europe in Barcelona ...
EDN

Analog IP subsystems unveiled for RISC-V cores

A set of IP subsystems for typical battery-powered Internet of Things (IoT) systems is unveiled at the RISC-V Summit Europe in Barcelona on 5-9 June 2023. These digitally wrapped analog IP subsystems ...
Electronic Design

RISC-V-Based Open-Source Cores Have Processor Subsystem IP, Tools

Building on the CORE-V processor IP, the solution is a full system-on-chip powered by CORE-V and boasts a full suite of peripherals. At embedded world 2023, OpenHW Group showcased its CORE-V Family of ...
Electronics Weekly

Sundance launches RISC-V module for embedded system development

Sundance, the embedded module specislist, has launched PolarBerry, a production and deployment-ready SoM with a hardened 64 bit, multicore real-time, Linux-capable RISC-V MPU subsystem to deliver an ...
Yahoo Finance

GOWIN Semiconductor & Andes Technology Corp. Announce The First Ever RISC-V CPU and Subsystem Embedded 22nm SoC FPGA

SAN JOSE, Calif., Aug. 29, 2023 (GLOBE NEWSWIRE) -- Andes Technology Corporation (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099), a leading supplier of high efficiency, low-power 32/64-bit RISC-V ...
Yahoo Finance

Intrinsix Cryptographic IP Selected by DARPA for Use in Chips Program, Featuring RISC-V Security Processor

MILPITAS, CA--(Marketwired - November 27, 2017) - INTRINSIX CORP, An advanced semiconductor design services firm announced that it's security and cryptographic subsystem IP has been selected by DARPA ...
EDN

Breker Verification Systems Launches Unique RISC-V TrekApp for Automated, High-Coverage System Integration Test Suite Synthesis

Developed with SiFive to address RISC-V system integration validation; generates high-impact SoC verification test suite with minimal manual effort. Breker Verification Systems, the leading provider ...
Design-Reuse

First RISC-V-Based System-on-Chip (SoC) FPGA Enters Mass Production

Microchip’s Mi-V ecosystem has enabled customers to ramp products based on PolarFire ® devices more quickly, from prototypes to production CHANDLER, Ariz., June 8, 2022 – The first SoC Field ...
EE Herald

Agile Analog launches complete analog IP subsystem for RISC-V applications

Agile Analog has announced launch of its first complete analog IP subsystem for RISC-V applications at the RISC-V Summit Europe in Barcelona (5-9 June). The initial subsystem includes all the analog ...
New Electronics

Agile Analog launches first complete RISC-V analogue IP subsystem

The subsystem, launched at the RISC-V Summit Europe in Barcelona, includes all the analogue IP required for a typical battery powered IoT system, including a power management unit (PMU), a sleep ...