Electronic Design

Overcome Traditional Memory-Speed Barriers With Embedded DRAM

For applications where performance is of primary importance, designers have traditionally chosen SRAM technology over DRAM. Although commodity DRAM offers much higher density and a lower cost per bit, ...
EDN

DRAM tuning looks to speed graphics work

Fremont, Calif. – Graphics could be processed faster by breaking up the DRAM array into a bunch of smaller independent arrays with separate row and column decoders, Rambus engineers suggest. In a ...
EDN

0.4-V DRAM array technology using twin cells for next generation mobile devices

Hitachi, Ltd. (NYSE: HIT / TSE: 6501) in cooperation with Elpida Memory, Inc. (TSE: 6665), have proposed a new DRAM(*1) circuit design enabling 0.4-V operation. The proposed array employs a twin cell ...
EDN

IBM’s Cu-32 Custom Logic SOI Process with Embedded DRAM Memory

Earlier this month, IBM announced a new Cu-32 Custom Logic chip-making technology that can be used to dramatically increase the memory capacity and processing speeds of chips. The application target ...
Electronic Design

Memory Directions: Speed, Speed, And Density

In general, the faster data can be retrieved, the faster the host processor can execute its algorithms. Internal parallelism on the processor side requires ever-faster data-transfer rates from ...