Forbes

The RISC-V Architecture Secures Smartwatches With Google And Qualcomm

Today, Google and Qualcomm announced an extension of their partnership to bring RISC-V-based systems-on-chips (SoCs) to market with support for Wear OS, a version of Android for smartwatches and ...
ITWire

The Risc-V architecture that can shape the future of computing

Open source software rightly gets a lot of attention; open source hardware has its part to play too. One development drawing increasing attention in both technical and executive circles is RISC-V, ...
Ars Technica

Doubling the voltage: What 800 V architecture really changes in EVs

For more than a decade, most electric vehicles have shared the same electrical backbone: a battery pack operating at roughly 400 V. It’s the invisible standard behind everything from early compliance ...
Semiconductor Engineering

Differentiation And Architecture Licenses In RISC‑V

I was discussing with a colleague about the concept of architecture license in RISC-V. I realized that, in the open-source world, it can be a little tricky to grasp. In a traditional processor IP ...
Semiconductor Engineering

A RISC-V Capability Architecture Orchestrating Compiler, Architecture, And System Designs For Full Memory Safety (Georgia Tech, Arm Research)

A technical paper titled “RV-CURE: A RISC-V Capability Architecture for Full Memory Safety” was published by researchers at Georgia Institute of Technology and Arm Research. “Despite decades of ...
Electronic Design

RISC-V Architecture: Path to Mainstream Likely to be a Bit of a Slog

The introduction of SiFive’s Freedom E310 RISC-V chip in 2016 and announcements at last week’s Embedded World by Microsemi, Antmicro, and UltraSoC are helping raise the profile of RISC-V, an open ...
Design-Reuse

RISC-V: The Open-Source Revolution in CPU Architecture

RISC-V is an open-source Instruction Set Architecture (ISA) that rapidly transforms the CPU design and development landscape. Unlike proprietary ISAs, RISC-V allows free access to architecture ...